Portfolio Under Construction
This portfolio page is currently being updated. Please visit my CV for links to my projects and research work.
This portfolio page is currently being updated. Please visit my CV for links to my projects and research work.
Under review at ACM Transactions on Architecture and Code Optimization (TACO)
LoopPoint: A synchronization-agnostic loop-based sampling methodology that enables fast, accurate simulation of multi-threaded workloads via loop-bounded checkpoints (LoopPoint paper extension).
Recommended citation: TBD
Published in IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2026
An LLVM IR-based sampling framework that turns long-running workloads into portable program snippets which can be analyzed once, then reused across binaries, ISAs, and microarchitectures.
Recommended citation: Qiu, Z., Samani, M., & Lowe-Power, J., "Nugget: Portable Program Snippets." 2026 IEEE International Symposium on High-Performance Computer Architecture (HPCA). Sydney, Australia.
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Published:
Tutorial on LoopPoint sampling methodology and tools for efficiently simulating complex multi-threaded workloads using Sniper and gem5 simulators.
Published:
Comprehensive workshop on the gem5 simulator, covering architecture modeling, simulation methodology, and practical applications in computer architecture research.
Published:
Hands-on bootcamp training on gem5 simulator fundamentals, architecture simulation, and advanced simulation techniques for computer architecture research.
Published:
Presentation of the Nugget paper on portable program snippets for efficient workload characterization and simulation.
Published:
Technique talk on integrating Nugget with LLVM infrastructure for advanced workload sampling and analysis at CGO 2026.
Teaching Assistant, University of California, Davis, 2024
Teaching Assistant for ECS 154B Computer Architecture course at UC Davis, covering processor design, memory systems, and performance evaluation.